• In the wake of the growing amount of data being processed in data centers, it is necessary to send the data at increasingly higher speeds. The goal of this project is to build a modern high-speed link that can process data at a rate of 25Gb/s. Basically, the link sends data from a transmitter to a receiver. The straightforward solution of data transiting into a simple wire between those two...
    Categories:
  • An accurate, small, low-power CMOS temperature sensor for on-chip thermal monitoring will be designed and analyzed in this project. The temperature sensor utilizes the temperature characteristics of the threshold voltage of a MOS transistor to sense temperature and is quite linear over the in-temperature range (-20C, 100°C). Mixed signal, switch capacitor based architecture will be analyzed during evaluation study and implemented in 28nm technology. The circuits will be designed under...
    Categories:
  • This project deals with design and optimization of low voltage band gap reference circuits, based on 28nm TSMC technology. In this project several low voltage band gab architectures will be analyzed during an evaluation study and the results will be compared. The circuits will be designed under required performance constraints of minimal power, layout area, signal cross talks and noise reduction using advanced IC technologies. The students will be responsible...
    Categories:
  • Background information: Recently, several different memristive technologies (ReRAM, CBRAM, PCM and STT-MRAM) have emerged as promising candidates for digital and analog in-memory computation. Deep neural networks (DNNs) are one of the main application to benefit from analog in-memory computation. However, the noisy nature of analog computation may let to performance (“accuracy”) degradation. In this project, you will use IBM analog hardware acceleration kit, a kit developed by IBM to simulate...
  • Background: Processing-in-memory (PIM) solutions unite computation and memory to overcome the memory-wall, while also introducing ample opportunities for high-throughput operations. Memristive processing-in-memory is based on the memristor: an emerging fundamental device that is capable of both storage and logic by representing binary information through resistance. Efficient utilization of processing-in-memory requires rethinking many aspects of computing systems, including novel algorithmic techniques that can utilize the high-throughput of PIM.   Algorithmic Paradigm:...
    Categories: | |
  • Introduction: Recently, power dissipation is becoming a dominant factor in choosing the next technology. For this reason, most figures of merits currently used to test the potential of a given technology to be the next leading technology in the industry are Operations/Second x Watt or Joule/bit….and not just Operations/Second. Superconductivity is the phenomenon in which we have zero DC resistance and is viewed as a technology capable of achieving better...
    Categories:
  • Emerging mm-wave systems, such as the 5G new radio, will be implemented as phased arrays (multiple transmitters and receivers channels connected to an array of antennas) integrated in CMOS chips. RF CMOS circuit excels in the integration of complex circuits but suffer from a degradation in performance due to mismatches between devices originating in the fabrication process. As matching between the channels is critical for the array performance, calibration circuits...
    Categories: |
  • The ability to reliably and quickly model the behavior of basic biological processes may allow future analysis of complex biological systems and the use of models for drug research and development. As equations describing transistor operation below the threshold voltage and equations describing chemical reactions have significant similarities, analog circuits can be designed to model biochemical reactions and biological processes. In cytomorphic engineering the cellular behavior of biological systems is...
    Categories:
  • A conventional address decoder is conceptually based on a multi-input AND gate that selects a memory row. A unique address of a memory row is set by hardwiring the direct and inverted address bits to the inputs of the AND gate. In a decoder position where the input address matches the hardwired pattern, the AND gate outputs ‘1’, selecting the memory row. The address of a memory row is permanently...
    Categories: |
  • Background: Single-wall semiconducting carbon nanotube (CNT) field-effect transistors (CNFETs) have been among the foremost candidates to complement Si and extend CMOS technology scaling to sub-10-nm technology thanks to the atomically thin body of CNTs and their near-ballistic transport. However, non-deterministic control over CNT chirality and various devices non-idealities (such as high contact resistance (Rc), parasitic capacitance and tunneling leakage currents) can hinder the realization of true CNFET based integrated circuits....
    Categories:
  • In this project some alternative low voltage thermal sensor circuits architectures will be analyzed during an evaluation study and the results will be compared. The circuits will be designed under required performance constraints of minimal power, layout area, signal cross talks and noise reduction using advanced IC technologies.
    Categories:
  • Project description: This project involves the design and optimization of ∆∑ ADC Architecture for CMOS Image Sensor based on 0.18um TSMC technology. This work presents a 2 Mpixel, 120 frame/s CMOS image sensor with column-parallel delta-sigma ∆∑ ADC architecture. The use of a second-order ∆∑ ADC improves the conversion speed while reducing the random noise (RN) level as well. The ∆∑ ADC employing an inverter-based ∆∑ modulator and a compact...
    Categories:
  • In this project, theories of the cellular nonlinear network will be studied and the possibilities of using memristive devices in these networks will be investigated. A software model of prototype cellular nonlinear neural network accounting for the behaviors of memristive devices as the synaptic connections will be implemented and a series of simulations will be performed.
  • The Bitlet model is a new an analytical, parameterized,  modeling tool, developed in the ASIC2 lab. The Bitlet model can be used to estimate the performance and the power of a PIM-based system and thereby assess the affinity of workloads for PIM as opposed to traditional computing.In order to make Bitlet more beneficial, it has to be made more accessible to users by equipping it with new features and interactive graphical...
  • Ferroelectric Field Effect Transistor (FeFET) memory has shown the potential to meet the requirements of the growing need for fast, dense, low power and non-volatile memories.Integrating a layer of ferroelectric within the gate stack of a regular Field Effect Transistor (FET) enables the transistor to store data in the polarization state of the ferroelectric. In this project, we look for appropriate application of binary neural network (BNN) which can benefit...
  • Recent research in nanoelectronics has begun exploring the potential of carbon nanotube field effect transistors (CNFETs) as a successor to CMOS. In order to evaluate the potential of CNFETs as an alternative to silicon CMOS technology, SPICE models of CNFETs have been developed. The goal of this project is to develop a smart algorithm, based on logic effort, to design circuits more efficiently for delay optimization.
    Categories:
  • In this project a tunable power amplification stage will be designed and evaluated. Both stabilization techniques and matching networks will be implemented by memristor-based circuits. The project is based on advanced research. The implementation will be done in Virtuoso and/or ADS.
    Categories: | |
  • In this project some alternative SC Integrator architectures will be analyzed during an evaluation study and the results will be compared. The circuits will be designed under required performance constraints of minimal power, layout area, signal cross talks and noise reduction using advanced IC technologies.
    Categories:
  • In this project, the RF model of the indirectly heated four-terminal PCM RF switch will be improved and verified against experimental data. The model will be unified with an electro-thermal model of the device to perform optimizations of the device structure for different applications. This model will be used to explore the design constraints of these devices and to find the optimum device geometries for different applications.
    Categories: |
  • In this project, a loaded-line phase shifter based on the PCM RF switch that we are developing in our group will be designed and evaluated. Phase shifters are fundamental devices to control the steer the beam in an antenna array and a great number of phase-shifters are required for this critical functionality in 5G and radar systems. PCM RF switches can increase the performance, while reducing the area overhead and...
    Categories: | |
  • An accurate, small, low-power CMOS temperature sensor for on-chip thermal monitoring will be designed and analyzed in this project. The temperature sensor utilizes the temperature characteristics of the threshold voltage of a MOS transistor to sense temperature and is quite linear over the in-temperature range (-20C, 100°C). In this project some alternative temperature sensor architectures will be analyzed during an evaluation study and the results will be compared.
    Categories:
  • The voltage-controlled oscillator (VCO) is a critical sub-block in communications transceivers. The role of the VCO in a transceiver and the VCO requirements will be reviewed and the necessity of GHz VCOs and the driving factors towards the monolithic integration of the VCO be examined. In addition, the VCO design techniques will be outlined and design trade-offs be explored.
    Categories:
  • In this project, the students will perform characterization of a Resistive RAM (ReRAM) Crossbar array. They will work with a packaged device that contains a few arrays. The measurement setup will be based on a set of SMUs (Source Measure Units)  and a PC platform that control the measuring equipment. The students will use Python to create a set of tool that allow for automatic parameter extraction from memristive devices...
    Categories: |
  • STT-MRAM writes to a memory array by manipulating electron spin with a polarizing current, performs like DRAM but requires no refresh, significant reduction in switching energy compared to FS Toggle MRAM, highly scalable, enabling higher density memory products (sampling 1Gb in 2019), can interface with JEDEC DDR3 with minor modification, and is  quite an attractive emerging memory. The goal of this project is to implement and simulate circuits using this device.
    Categories: | |
  • ReRAM is an emerging technology in both Industrial and academic communities. Compliance current (CC) is a factor that can significantly influence ReRAM potential performance. The goal of this project is to design and implement a CC measurement circuit and to perform CC measurements on ReRAM devices.
    Categories: |
  • Resistive memories are non-volatile, dense, and CMOS compatible devices capable of addressing the scaling challenges of traditional CMOS memories. Spin torque transfer magnetoresistive RAM (STT-MRAM) is particularly advantageous for microprocessor memory structures due to the near infinite write endurance and CMOS compatible voltage levels. These devices, however, are constrained by relatively long and unpredictable write latencies that hinder integration of these devices within critical in-core applications. Just a few months...
    Categories: |
  • The growing demand to connect the world is pushing wireless systems to be smaller than ever. This is part of the increasing move to a data driven world with billions of connected devices in the era of the Internet of Things (IoT) and space and energy are critical design criteria. Traditionally, miniaturization was possible owing to a focus in a single frequency and a single communication protocol. However, the real...
  • Reconfigurable RF integrated circuits are an attractive feature for sustaining the increasing number of standards and functionalities of modern mobile devices. While back-end circuits in a radio transceiver (e.g., baseband analog, IF and digital) can be reconfigured using MOSFET switches, front-end circuits require high performance switches since resonant narrowband circuits require high quality factor inductors and capacitors. Phase-change-materials (PCM)-based RF switches have been proposed as high-performance RF switches due to...
    Categories: |
  • The negative impedance converter (NIC) is a one-port Op-Amp circuit acting as a negative load which injects energy into circuits in contrast to an ordinary load that consumes energy from them. This is achieved by adding or subtracting excessive varying voltage in series to the voltage drop across an equivalent positive impedance. This reverses the voltage polarity or the current direction of the port and introduces a phase shift of...
    Categories:
  • With the recent advance of wearable devices and Internet of Things (IoTs), it becomes attractive to implement the Deep Convolutional Neural Networks (DCNNs) in embedded and portable systems. Currently, executing the software-based DCNNs requires high-performance and high-power servers. Stochastic Computing (SC), which uses a bit-stream to represent a number within [-1, 1] by counting the number of ones in the bit-stream, has high potential for implementing CNNs with ultra-low hardware...
    Categories: |
  • Reconfigurable RF integrated circuits are an attractive feature to sustain the increasing number of standards and functionalities of modern mobile devices. While back-end circuits in a radio transceiver (e.g., baseband analog, IF and digital) can be reconfigured using MOSFET switches, front-end circuits require high performance switches since resonant narrowband circuits require high quality factor inductors and capacitors. Phase-change-materials (PCM)-based RF switches have been proposed as high-performance RF switches due to...
  • Recent research in nanoelectronics has begun to explore the potential of carbon nanotube field effect transistors (CNFETs) as a successor to CMOS. Studies of individual carbon nanotubes have demonstrated that they have excellent electrical properties, including high electron mobility. Experiments with CNFETs have further demonstrated that these devices have large transconductances, which indicates a great potential for nanoelectronic circuits. One of the challenges the CNT-FET industry is facing these days...
  • המימדים הגדולים והמחיר הגבוה של מיכשור מודרני לטיפול בסרטן ע"י הקרנה (רדיותרפיה), נגזרים בעיקר ממאיץ האלקטרונים. טכניקות ההאצה שבשימוש היום מכתיבות מאיץ באורך של מטר כדי ליצר קרינה בעלת אנרגיה גבוהה מספיק לטיפול. מחקר שמתבצע בימים אלה בפקולטה, עוסק בפיתוח מאיץ המסוגל להאיץ אלקטרונים לאנרגיות גבוהות באמצאות לייזר ומוליך גלים דיאלקטרי.
  • המעבדה מציעה פרויקטים בתחום המעגלים המשולבים בתדר רדיו הכוללים תכן של מעגלי תקשורת בתהליכי CMOS מתקדמים בתחום הננומטרי כמו 40nm ו- 28nm. הפרויקט כולל שלב של איפיון ובחינת טופולוגיות תכנוניות , ביצוע תכנון בכלי CAD מרכזיים כמו Virtuoso של Cadence ו- ADS של Keysight ,יישום תוך הכנסת שיקולי layout ובמקרים מסוימים (ורק עבור פרויקט שנתי) תהיה גם אפשרות ייצור השבב ובדיקתו. הבדיקות יתבצעו באמצעות ציוד מיוחד לבדיקת שבבים ותדר גבוה...
  • המעבדה מציעה פרויקטים בתחום המעגלים המשולבים בתדר רדיו הכוללים תכן של מעגלי תקשורת בתהליכי CMOS מתקדמים בתחום הננומטרי כמו 40nm ו- 28nm. הפרויקט כולל שלב של איפיון ובחינת טופולוגיות תכנוניות , ביצוע תכנון בכלי CAD מרכזיים כמו Virtuoso של Cadence ו- ADS של Keysight ,יישום תוך הכנסת שיקולי layout ובמקרים מסוימים (ורק עבור פרויקט שנתי) תהיה גם אפשרות ייצור השבב ובדיקתו. הבדיקות יתבצעו באמצעות ציוד מיוחד לבדיקת שבבים ותדר גבוה...
  • המעבדה מציעה פרויקטים בתחום המעגלים המשולבים בתדר רדיו הכוללים תכן של מעגלי תקשורת בתהליכי CMOS מתקדמים בתחום הננומטרי כמו 40nm ו- 28nm. הפרויקט כולל שלב של איפיון ובחינת טופולוגיות תכנוניות , ביצוע תכנון בכלי CAD מרכזיים כמו Virtuoso של Cadence ו- ADS של Keysight ,יישום תוך הכנסת שיקולי layout ובמקרים מסוימים (ורק עבור פרויקט שנתי) תהיה גם אפשרות ייצור השבב ובדיקתו. הבדיקות יתבצעו באמצעות ציוד מיוחד לבדיקת שבבים ותדר גבוה...
  • The growing demand to connect up the world is pushing wireless systems to be smaller than ever. This is part of the increasing move to a data driven world with billions of connected devices in the era of the Internet of Things (IoT) and space and energy are critical design criteria. Traditionally, miniaturization was possible owing to a focus in a single frequency and a single communication protocol. However, the...
    Categories: |
  • The growing demand to connect up the world is pushing wireless systems to be smaller than ever. This is part of the increasing move to a data driven world with billions of connected devices in the era of the Internet of Things (IoT) and space and energy are critical design criteria. Traditionally, miniaturization was possible owing to a focus in a single frequency and a single communication protocol. However, the...
    Categories: |
  • Memristors are resistive devices with varying resistance which depends on the voltage applied to the device. The most natural memristor application is memory. However memristors can also be used for other applications, for example logic circuits. Once such approach is MRL (Memristor Ratioed Logic) - a hybrid CMOS-memristive logic family. In MRL, OR and AND logic gates are designed using memristors. The limitation of MRL is that every memristor-based logic...
    Categories: |
  • Resistive memory is a new technology based on a passive circuit element called Memristor, which changes its resistance value based on the current flowing through it. Memristors are nanoscale elements that can be easily integrated in a typical VLSI manufacturing process. Therefore, memristors can be combined with existing structures to create new circuits. Memristors have a list of unique properties, such as non-volatility, non-linearity and sensitivity to process that make...
    Categories:
  • The Technion's innovative TMOS sensors utilize the widely available and affordable CMOS-SOI technology together with MEMS micromachining to a achieve break-through in passive IR imaging. The CMOS-SOI technology allows integration of the 2D sensors focal plane array matrix with the analog readout, which the subject of this project. Many types of sensors use capacitive sensing, including sensors used to detect and measure proximity, position or displacement, humidity, fluid level, and...
    Categories: |
  • GMOS is a new gas sensor developed at the Technion. It is based on a thermally isolated floating MOS transistor used to sense temperature changes as a result of a chemical reaction that takes place when the gas comes in direct contact with the sensor. When a constant voltage is applied to the transistor, its current signal follows the temperature variations. This current signal should be read out and amplified...
    Categories: |
  • This project deals with the design and optimization of ∆∑ Algorithmic ADC conversion using the 0.18um STM technology. Delta-sigma modulation for analog-to-digital conversion resolves a number of bits which is logarithmic in the number of modulation cycles, and is linear with respect to the modulation order. As an alternative to higher-order noise shaping, an algorithmic scheme is proposed that iteratively resamples the modulation residue, by feeding the integrator output back...
    Categories: |
  • Fast Gain-Cell Design for eDRAM-centric Design
    The need for SRAM replacement This proposal aims at replacing SRAM technology by Gain-Cell (GC) Embedded DRAM (eDRAM) in processors design. While the demand for on-die storage is increasing, the supply voltage has reached deep sub-volt level, where SRAM cells are susceptible to data corruption and information loss. Increasing the supply voltage is out of consideration since it causes dramatic increase in power consumption. We suggest replacing SRAM by GCeDRAM,...
    Categories: |
  • As the demand for high throughput increases for applications like HD 4K, VR glass, signal processing in autonomous car, a high speed chip to chip interface become a bottleneck for data transfer between components. Few examples includes RF front end communication with the application processor SOC, FPGA accelerator communications with display chip/memory, high definition 3D camera communications with DSP chip and more. In order to support the high data throughput,...
    Categories:
  • In this project, you will implement optical G-MOS detectors based on CMOS-SOI-MEMS technology. You will be responsible for the device coupled electrical/thermal and mechanical behavior requirements, analysis and specifications definition.
    Categories:
    Tags:
  •   Background information: Project description: המעבדה מציעה פרויקטים בתחום המעגלים המשולבים בתדר רדיו הכוללים תכן של מעגלי תקשורת בתהליכי CMOS מתקדמים בתחום הננומטרי כמו 40nm ו- 28nm. הפרויקט כולל שלב של איפיון ובחינת טופולוגיות תכנוניות , ביצוע תכנון בכלי CAD מרכזיים כמו Virtuoso של Cadence ו- ADS של Keysight ,יישום תוך הכנסת שיקולי layout ובמקרים מסוימים (ורק עבור פרויקט שנתי) תהיה גם אפשרות ייצור השבב ובדיקתו. הבדיקות יתבצעו באמצעות ציוד...
    Categories: |
    Tags: