Analog

  • CNT Centric Optimization of CNFET Based Technology in Small Digital Integrated Circuits

    In this project the students will learn about CNTs, and about CNT based FETs and their properties. They will design and simulate small CNFET-based integrated circuits using the new model. Then, they will explore in depth the various optimization opportunities and their limits from the realistic CNT centric point of view and compare them to latest CMOS technologies.
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  • Low Voltage CMOS Based Thermal Sensor Circuits

    In this project some alternative low voltage thermal sensor circuits architectures will be analyzed during an evaluation study and the results will be compared. The circuits will be designed under required performance constraints of minimal power, layout area, signal cross talks and noise reduction using advanced IC technologies.
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  • Low Voltage CMOS Based Band Gap Circuits

    In this project several low voltage band gap architectures will be analyzed during an evaluation study and the results will be compared. The circuits will be designed under required performance constraints of minimal power, layout area, signal cross talks and noise reduction using advanced IC technologies.
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  • Delta Sigma ADC Architecture for CMOS Image Sensor

    In this project some alternative ∆∑ ADC architectures will be analyzed during an evaluation study and the results will be compared. The circuits will be designed under required performance constraints of minimal power, layout area, signal cross talks and noise reduction using advanced IC technologies.
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  • Cellular Nonlinear Network based on Memristive Devices

    In this project, theories of the cellular nonlinear network will be studied and the possibilities of using memristive devices in these networks will be investigated. A software model of prototype cellular nonlinear neural network accounting for the behaviors of memristive devices as the synaptic connections will be implemented and a series of simulations will be performed.
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  • GUI Implementation and New Features for Bitlet

    The Bitlet model is a new an analytical, parameterized,  modeling tool, developed in the ASIC2 lab. The Bitlet model can be used to estimate the performance and the power of a PIM-based system and thereby assess the affinity of workloads for PIM as opposed to traditional computing.In order to make Bitlet more beneficial, it has to be made more accessible to users by equipping it with new features and interactive graphical...
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  • Binary Neural Network (BNN) Accelerator Implementation within Ferroelectric Memory Array

    Ferroelectric Field Effect Transistor (FeFET) memory has shown the potential to meet the requirements of the growing need for fast, dense, low power and non-volatile memories.Integrating a layer of ferroelectric within the gate stack of a regular Field Effect Transistor (FET) enables the transistor to store data in the polarization state of the ferroelectric. In this project, we look for appropriate application of binary neural network (BNN) which can benefit...
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  • Modeling of Biological Processes using Subthreshold Analog Circuits

    The ability to reliably and quickly model the behavior of basic biological processes may allow future analysis of complex biological systems and the use of models for drug research and development. In cytomorphic engineering the cellular behavior of biological systems is modeled using analog circuits. For example, the process of making a protein according to a genetic code found in DNA can be modeled using an analog circuit that includes...
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  • Logic Effort Based Delay Optimization Algorithms for Carbon Nanotube FET Technology

    Recent research in nanoelectronics has begun exploring the potential of carbon nanotube field effect transistors (CNFETs) as a successor to CMOS. In order to evaluate the potential of CNFETs as an alternative to silicon CMOS technology, SPICE models of CNFETs have been developed. The goal of this project is to develop a smart algorithm, based on logic effort, to design circuits more efficiently for delay optimization.
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  • Memristor-based Multi-Band RF Power Amplifiers

    In this project a tunable power amplification stage will be designed and evaluated. Both stabilization techniques and matching networks will be implemented by memristor-based circuits. The project is based on advanced research. The implementation will be done in Virtuoso and/or ADS.
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  • The Implementation of a Switched Capacitor Integrator

    In this project some alternative SC Integrator architectures will be analyzed during an evaluation study and the results will be compared. The circuits will be designed under required performance constraints of minimal power, layout area, signal cross talks and noise reduction using advanced IC technologies.
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  • Design Exploration of Phase-Change RF Switches

    In this project, the RF model of the indirectly heated four-terminal PCM RF switch will be improved and verified against experimental data. The model will be unified with an electro-thermal model of the device to perform optimizations of the device structure for different applications. This model will be used to explore the design constraints of these devices and to find the optimum device geometries for different applications.
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  • Loaded-Line Phase Shifters Based on Phase-Change RF Switches

    In this project, a loaded-line phase shifter based on the PCM RF switch that we are developing in our group will be designed and evaluated. Phase shifters are fundamental devices to control the steer the beam in an antenna array and a great number of phase-shifters are required for this critical functionality in 5G and radar systems. PCM RF switches can increase the performance, while reducing the area overhead and...
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  • The Design and Implementation of a a Programmable Address Decoder

    A conventional address decoder is conceptually based on a multi-input AND gate that selects a memory row. A unique address of a memory row is set by hardwiring the direct and inverted address bits to the inputs of the AND gate. In a decoder position where the input address matches the hardwired pattern, the AND gate outputs ‘1’, selecting the memory row. The address of a memory row is permanently...
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  • Implementation of On-Chip Temperature Sensors

    An accurate, small, low-power CMOS temperature sensor for on-chip thermal monitoring will be designed and analyzed in this project. The temperature sensor utilizes the temperature characteristics of the threshold voltage of a MOS transistor to sense temperature and is quite linear over the in-temperature range (-20C, 100°C). In this project some alternative temperature sensor architectures will be analyzed during an evaluation study and the results will be compared.
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  • The Implementation of VCO Circuits

    The voltage-controlled oscillator (VCO) is a critical sub-block in communications transceivers. The role of the VCO in a transceiver and the VCO requirements will be reviewed and the necessity of GHz VCOs and the driving factors towards the monolithic integration of the VCO be examined. In addition, the VCO design techniques will be outlined and design trade-offs be explored.
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  • Continuous Time Linear Equalization (CTLE) Circuit Implementation

    In the wake of the growing amount of data being processed in data centers, it is necessary to send the data at increasingly higher speeds. The goal of this project is to build a modern high-speed link that can process data at a rate of 25Gb/s. Basically, the link sends data from a transmitter to a receiver. The straightforward solution of data transiting into a simple wire between those two...
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  • Resistive Memory Characterization Infrastructure

    In this project, the students will perform characterization of a Resistive RAM (ReRAM) Crossbar array. They will work with a packaged device that contains a few arrays. The measurement setup will be based on a set of SMUs (Source Measure Units)  and a PC platform that control the measuring equipment. The students will use Python to create a set of tool that allow for automatic parameter extraction from memristive devices...
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  • STT-MRAM Memory Controller: Optimization and New Features

    STT-MRAM writes to a memory array by manipulating electron spin with a polarizing current, performs like DRAM but requires no refresh, significant reduction in switching energy compared to FS Toggle MRAM, highly scalable, enabling higher density memory products (sampling 1Gb in 2019), can interface with JEDEC DDR3 with minor modification, and is  quite an attractive emerging memory. The goal of this project is to implement and simulate circuits using this device.
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  • A Compliance CC for ReRAM Characterization

    ReRAM is an emerging technology in both Industrial and academic communities. Compliance current (CC) is a factor that can significantly influence ReRAM potential performance. The goal of this project is to design and implement a CC measurement circuit and to perform CC measurements on ReRAM devices.
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  • STT-MRAM Based Multistate Register

    An STT-MRAM based multistate register has been designed, capable of storing multiple data bits within a single active register as a basic block of Continuous Flow Multi-Threading. This building block drastically reduces the number of cycles required to perform a context switch. Now we want to make it real i.e. integrate the register into a microprocessor and perform analysis to evaluate the gain in performance.
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  • Reconfigurable Voltage-Controlled Oscillator using Memristors

    The growing demand to connect the world is pushing wireless systems to be smaller than ever. This is part of the increasing move to a data driven world with billions of connected devices in the era of the Internet of Things (IoT) and space and energy are critical design criteria. Traditionally, miniaturization was possible owing to a focus in a single frequency and a single communication protocol. However, the real...
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  • Dual-Band Patch Antenna using Phase Change Material Based Switches

    Reconfigurable RF integrated circuits are an attractive feature for sustaining the increasing number of standards and functionalities of modern mobile devices. While back-end circuits in a radio transceiver (e.g., baseband analog, IF and digital) can be reconfigured using MOSFET switches, front-end circuits require high performance switches since resonant narrowband circuits require high quality factor inductors and capacitors. Phase-change-materials (PCM)-based RF switches have been proposed as high-performance RF switches due to...
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  • Design of Negative Impedance Converter

    The negative impedance converter (NIC) is a one-port Op-Amp circuit acting as a negative load which injects energy into circuits in contrast to an ordinary load that consumes energy from them. This is achieved by adding or subtracting excessive varying voltage in series to the voltage drop across an equivalent positive impedance. This reverses the voltage polarity or the current direction of the port and introduces a phase shift of...
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  • Low-Power Stochastic Computing for Convolutional Neural Networks Implementation

    With the recent advance of wearable devices and Internet of Things (IoTs), it becomes attractive to implement the Deep Convolutional Neural Networks (DCNNs) in embedded and portable systems. Currently, executing the software-based DCNNs requires high-performance and high-power servers. Stochastic Computing (SC), which uses a bit-stream to represent a number within [-1, 1] by counting the number of ones in the bit-stream, has high potential for implementing CNNs with ultra-low hardware...
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  • Tunable Microwave Filters using Phase Change Material-based Switches

    Reconfigurable RF integrated circuits are an attractive feature to sustain the increasing number of standards and functionalities of modern mobile devices. While back-end circuits in a radio transceiver (e.g., baseband analog, IF and digital) can be reconfigured using MOSFET switches, front-end circuits require high performance switches since resonant narrowband circuits require high quality factor inductors and capacitors. Phase-change-materials (PCM)-based RF switches have been proposed as high-performance RF switches due to...
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  • Contacts Electromagnetic Influences Modeling of CNT-FET

    Recent research in nanoelectronics has begun to explore the potential of carbon nanotube field effect transistors (CNFETs) as a successor to CMOS. Studies of individual carbon nanotubes have demonstrated that they have excellent electrical properties, including high electron mobility. Experiments with CNFETs have further demonstrated that these devices have large transconductances, which indicates a great potential for nanoelectronic circuits. One of the challenges the CNT-FET industry is facing these days...
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  • בניית מודל מאיץ אלקטרונים לצרכים רפואיים ב- HFSS

    המימדים הגדולים והמחיר הגבוה של מיכשור מודרני לטיפול בסרטן ע"י הקרנה (רדיותרפיה), נגזרים בעיקר ממאיץ האלקטרונים. טכניקות ההאצה שבשימוש היום מכתיבות מאיץ באורך של מטר כדי ליצר קרינה בעלת אנרגיה גבוהה מספיק לטיפול. מחקר שמתבצע בימים אלה בפקולטה, עוסק בפיתוח מאיץ המסוגל להאיץ אלקטרונים לאנרגיות גבוהות באמצאות לייזר ומוליך גלים דיאלקטרי.
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  • ממיר אותות אנלוגי לדיגטלי בקצבים גבוהים

    המעבדה מציעה פרויקטים בתחום המעגלים המשולבים בתדר רדיו הכוללים תכן של מעגלי תקשורת בתהליכי CMOS מתקדמים בתחום הננומטרי כמו 40nm ו- 28nm. הפרויקט כולל שלב של איפיון ובחינת טופולוגיות תכנוניות , ביצוע תכנון בכלי CAD מרכזיים כמו Virtuoso של Cadence ו- ADS של Keysight ,יישום תוך הכנסת שיקולי layout ובמקרים מסוימים (ורק עבור פרויקט שנתי) תהיה גם אפשרות ייצור השבב ובדיקתו. הבדיקות יתבצעו באמצעות ציוד מיוחד לבדיקת שבבים ותדר גבוה...
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  • מגבר דל רחש (LNA )  לתקשורת 5G ומכמים

    המעבדה מציעה פרויקטים בתחום המעגלים המשולבים בתדר רדיו הכוללים תכן של מעגלי תקשורת בתהליכי CMOS מתקדמים בתחום הננומטרי כמו 40nm ו- 28nm. הפרויקט כולל שלב של איפיון ובחינת טופולוגיות תכנוניות , ביצוע תכנון בכלי CAD מרכזיים כמו Virtuoso של Cadence ו- ADS של Keysight ,יישום תוך הכנסת שיקולי layout ובמקרים מסוימים (ורק עבור פרויקט שנתי) תהיה גם אפשרות ייצור השבב ובדיקתו. הבדיקות יתבצעו באמצעות ציוד מיוחד לבדיקת שבבים ותדר גבוה...
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  • מגבר הספק לתקשורת 5G ומכמים

    המעבדה מציעה פרויקטים בתחום המעגלים המשולבים בתדר רדיו הכוללים תכן של מעגלי תקשורת בתהליכי CMOS מתקדמים בתחום הננומטרי כמו 40nm ו- 28nm. הפרויקט כולל שלב של איפיון ובחינת טופולוגיות תכנוניות , ביצוע תכנון בכלי CAD מרכזיים כמו Virtuoso של Cadence ו- ADS של Keysight ,יישום תוך הכנסת שיקולי layout ובמקרים מסוימים (ורק עבור פרויקט שנתי) תהיה גם אפשרות ייצור השבב ובדיקתו. הבדיקות יתבצעו באמצעות ציוד מיוחד לבדיקת שבבים ותדר גבוה...
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  • Memristor-based Phase Shifters

    The growing demand to connect up the world is pushing wireless systems to be smaller than ever. This is part of the increasing move to a data driven world with billions of connected devices in the era of the Internet of Things (IoT) and space and energy are critical design criteria. Traditionally, miniaturization was possible owing to a focus in a single frequency and a single communication protocol. However, the...
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  • Memristor-based Tunable CMOS RF Amplifiers

    The growing demand to connect up the world is pushing wireless systems to be smaller than ever. This is part of the increasing move to a data driven world with billions of connected devices in the era of the Internet of Things (IoT) and space and energy are critical design criteria. Traditionally, miniaturization was possible owing to a focus in a single frequency and a single communication protocol. However, the...
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  • Design of an Arithmetic Logic Unit using Complementary Memristor Ratioed Logic

    Memristors are resistive devices with varying resistance which depends on the voltage applied to the device. The most natural memristor application is memory. However memristors can also be used for other applications, for example logic circuits. Once such approach is MRL (Memristor Ratioed Logic) - a hybrid CMOS-memristive logic family. In MRL, OR and AND logic gates are designed using memristors. The limitation of MRL is that every memristor-based logic...
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  • High Precision Differential Sense Amplifier for Resistive Memories

    Resistive memory is a new technology based on a passive circuit element called Memristor, which changes its resistance value based on the current flowing through it. Memristors are nanoscale elements that can be easily integrated in a typical VLSI manufacturing process. Therefore, memristors can be combined with existing structures to create new circuits. Memristors have a list of unique properties, such as non-volatility, non-linearity and sensitivity to process that make...
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  • Capacitive TMOS IR Sensing

    The Technion's innovative TMOS sensors utilize the widely available and affordable CMOS-SOI technology together with MEMS micromachining to a achieve break-through in passive IR imaging. The CMOS-SOI technology allows integration of the 2D sensors focal plane array matrix with the analog readout, which the subject of this project. Many types of sensors use capacitive sensing, including sensors used to detect and measure proximity, position or displacement, humidity, fluid level, and...
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  • Channel ReadOut Circuits for GMOS Sensor

    GMOS is a new gas sensor developed at the Technion. It is based on a thermally isolated floating MOS transistor used to sense temperature changes as a result of a chemical reaction that takes place when the gas comes in direct contact with the sensor. When a constant voltage is applied to the transistor, its current signal follows the temperature variations. This current signal should be read out and amplified...
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  • Sigma Delta Algorithmic ADC Conversion

    This project deals with the design and optimization of ∆∑ Algorithmic ADC conversion using the 0.18um STM technology. Delta-sigma modulation for analog-to-digital conversion resolves a number of bits which is logarithmic in the number of modulation cycles, and is linear with respect to the modulation order. As an alternative to higher-order noise shaping, an algorithmic scheme is proposed that iteratively resamples the modulation residue, by feeding the integrator output back...
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  • Fast Gain-Cell Design for eDRAM-centric Design

    Fast Gain-Cell Design for eDRAM-centric Design

    The need for SRAM replacement This proposal aims at replacing SRAM technology by Gain-Cell (GC) Embedded DRAM (eDRAM) in processors design. While the demand for on-die storage is increasing, the supply voltage has reached deep sub-volt level, where SRAM cells are susceptible to data corruption and information loss. Increasing the supply voltage is out of consideration since it causes dramatic increase in power consumption. We suggest replacing SRAM by GCeDRAM,...
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  • Differential High Speed Receiver Amplifier for SERDES in 10Gbps Applications

    As the demand for high throughput increases for applications like HD 4K, VR glass, signal processing in autonomous car, a high speed chip to chip interface become a bottleneck for data transfer between components. Few examples includes RF front end communication with the application processor SOC, FPGA accelerator communications with display chip/memory, high definition 3D camera communications with DSP chip and more. In order to support the high data throughput,...
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  • Optical G-MOS Gas Sensor in CMOS-SOI-MEMS Technology

    In this project, you will implement optical G-MOS detectors based on CMOS-SOI-MEMS technology. You will be responsible for the device coupled electrical/thermal and mechanical behavior requirements, analysis and specifications definition.
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  • Power Amplifier for 5G Communications and Radar

      Background information: Project description: המעבדה מציעה פרויקטים בתחום המעגלים המשולבים בתדר רדיו הכוללים תכן של מעגלי תקשורת בתהליכי CMOS מתקדמים בתחום הננומטרי כמו 40nm ו- 28nm. הפרויקט כולל שלב של איפיון ובחינת טופולוגיות תכנוניות , ביצוע תכנון בכלי CAD מרכזיים כמו Virtuoso של Cadence ו- ADS של Keysight ,יישום תוך הכנסת שיקולי layout ובמקרים מסוימים (ורק עבור פרויקט שנתי) תהיה גם אפשרות ייצור השבב ובדיקתו. הבדיקות יתבצעו באמצעות ציוד...
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