Resistive memories are non-volatile, dense, and CMOS compatible devices capable of addressing the scaling challenges of traditional CMOS memories. Spin torque transfer magnetoresistive RAM (STT-MRAM) is particularly advantageous for microprocessor memory structures due to the near infinite write endurance and CMOS compatible voltage levels. These devices, however, are constrained by relatively long and unpredictable write latencies that hinder integration of these devices within critical in-core applications.
Just a few months ago the 22nm GlobalFoundries libraries of MTJ based on EVERSPIN TECHNOLOGY were made available to the VLSI lab.
An STT-MRAM based multistate register has been designed, capable of storing multiple data bits within a single active register as a basic block of Continuous Flow Multi-Threading. This building block drastically reduces the number of cycles required to perform a context switch. Now we want to make it real!
Project Description:
•Read papers, hands-on VLSI tools & library integration
•Learn first project, Optimize Register design and prove feasibility
•Integrate new results to paper frame
•Be part of fabrication process
Supervisor : Eric Herbelin 054- 4946383, Lab718, ericherbelin@ee.Technion.ac.il