Background information: Recently, several different memristive technologies (ReRAM, CBRAM, PCM and STT-MRAM) have emerged as promising candidates for digital and analog in-memory computation. Deep neural networks (DNNs) are one of the main application to benefit from analog in-memory computation. However, the noisy nature of analog computation may let to performance (“accuracy”) degradation. In this project, you will use IBM analog hardware acceleration kit, a kit developed by IBM to simulate...
Memristors
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Background: Processing-in-memory (PIM) solutions unite computation and memory to overcome the memory-wall, while also introducing ample opportunities for high-throughput operations. Memristive processing-in-memory is based on the memristor: an emerging fundamental device that is capable of both storage and logic by representing binary information through resistance. Efficient utilization of processing-in-memory requires rethinking many aspects of computing systems, including novel algorithmic techniques that can utilize the high-throughput of PIM. Algorithmic Paradigm:...
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A conventional address decoder is conceptually based on a multi-input AND gate that selects a memory row. A unique address of a memory row is set by hardwiring the direct and inverted address bits to the inputs of the AND gate. In a decoder position where the input address matches the hardwired pattern, the AND gate outputs ‘1’, selecting the memory row. The address of a memory row is permanently...
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In this project, theories of the cellular nonlinear network will be studied and the possibilities of using memristive devices in these networks will be investigated. A software model of prototype cellular nonlinear neural network accounting for the behaviors of memristive devices as the synaptic connections will be implemented and a series of simulations will be performed.
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The Bitlet model is a new an analytical, parameterized, modeling tool, developed in the ASIC2 lab. The Bitlet model can be used to estimate the performance and the power of a PIM-based system and thereby assess the affinity of workloads for PIM as opposed to traditional computing.In order to make Bitlet more beneficial, it has to be made more accessible to users by equipping it with new features and interactive graphical...
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Ferroelectric Field Effect Transistor (FeFET) memory has shown the potential to meet the requirements of the growing need for fast, dense, low power and non-volatile memories.Integrating a layer of ferroelectric within the gate stack of a regular Field Effect Transistor (FET) enables the transistor to store data in the polarization state of the ferroelectric. In this project, we look for appropriate application of binary neural network (BNN) which can benefit...
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In this project, SPnTs using the indirectly heated four-terminal PCM RF switch will be designed and simulated. The SPnTs will be designed based on the PCM fabrication process so that it can be eventually fabricated and tested.
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In this project, the RF model of the indirectly heated four-terminal PCM RF switch will be improved and verified against experimental data. The model will be unified with an electro-thermal model of the device to perform optimizations of the device structure for different applications. This model will be used to explore the design constraints of these devices and to find the optimum device geometries for different applications.
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The goal of this project is to use multi-state registers to implement an efficient architecture of Continuous Flow Multi-Threading microprocessor.
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In this project, tunable inductors using the indirectly heated four-terminal PCM RF switch will be designed and simulated. The inductor will be designed based on the PCM fabrication process so that it can be eventually fabricated and tested.
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In this project, a loaded-line phase shifter based on the PCM RF switch that we are developing in our group will be designed and evaluated. Phase shifters are fundamental devices to control the steer the beam in an antenna array and a great number of phase-shifters are required for this critical functionality in 5G and radar systems. PCM RF switches can increase the performance, while reducing the area overhead and...
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In this project, an RF model of the indirectly heated four-terminal PCM RF switch will be developed and verified against experimental data. This model will be useful to accurately predict the behavior of these devices and to simulate large circuits with small computational power.
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In this project, a thermoelectrical model of the indirectly heated four-terminal PCM RF switch will be developed and verified against experimental data. This model will be useful to accurately predict the behavior of these devices and to simulate large circuits with small computational power.Categories: Analog | ElectroMagnetic/Heat/Mechanical and Device Simulations | Memristors | Memristors | RF
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In this project, the students will design and implement an algorithm for executing state machines within a memristor-based memory. Such a novel method enables implementing a processor within the memory, thus eliminating the need for an external processor in small systems, and therefore reduces the limitations of today's computer systems.
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In this project, the students will perform characterization of a Resistive RAM (ReRAM) Crossbar array. They will work with a packaged device that contains a few arrays. The measurement setup will be based on a set of SMUs (Source Measure Units) and a PC platform that control the measuring equipment. The students will use Python to create a set of tool that allow for automatic parameter extraction from memristive devices...
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STT-MRAM writes to a memory array by manipulating electron spin with a polarizing current, performs like DRAM but requires no refresh, significant reduction in switching energy compared to FS Toggle MRAM, highly scalable, enabling higher density memory products (sampling 1Gb in 2019), can interface with JEDEC DDR3 with minor modification, and is quite an attractive emerging memory. The goal of this project is to implement and simulate circuits using this device.
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ReRAM is an emerging technology in both Industrial and academic communities. Compliance current (CC) is a factor that can significantly influence ReRAM potential performance. The goal of this project is to design and implement a CC measurement circuit and to perform CC measurements on ReRAM devices.
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Resistive memories are non-volatile, dense, and CMOS compatible devices capable of addressing the scaling challenges of traditional CMOS memories. Spin torque transfer magnetoresistive RAM (STT-MRAM) is particularly advantageous for microprocessor memory structures due to the near infinite write endurance and CMOS compatible voltage levels. These devices, however, are constrained by relatively long and unpredictable write latencies that hinder integration of these devices within critical in-core applications. Just a few months...
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The growing demand to connect up the world is pushing wireless systems to be smaller than ever. This is part of the increasing move to a data driven world with billions of connected devices in the era of the Internet of Things (IoT) and space and energy are critical design criteria. Traditionally, miniaturization was possible owing to a focus in a single frequency and a single communication protocol. However, the...
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The growing demand to connect up the world is pushing wireless systems to be smaller than ever. This is part of the increasing move to a data driven world with billions of connected devices in the era of the Internet of Things (IoT) and space and energy are critical design criteria. Traditionally, miniaturization was possible owing to a focus in a single frequency and a single communication protocol. However, the...
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Memristors are resistive devices with varying resistance which depends on the voltage applied to the device. The most natural memristor application is memory. However memristors can also be used for other applications, for example logic circuits. Once such approach is MRL (Memristor Ratioed Logic) - a hybrid CMOS-memristive logic family. In MRL, OR and AND logic gates are designed using memristors. The limitation of MRL is that every memristor-based logic...