Analog VLSI Design

Short Description:

The goal of the experiment is to introduce the students to the main principles of the MOS transistor implementation, the basic VLSI analog design flow and the Cadence analog design environment. The students will how to draw schematics, run different types of analog simulations and how to draw and verify layout.




The students will learn the basic principles of analog circuit design and simulation followed by layout design and verification. The first part of the experiment starts with the design of a simple common source amplifier. Next, you will run small signal AC and noise simulations and understand how the circuit elements affect the bandwidth of the amplifier. Next you will learn to use the optimization tool to get maximum amplification for a set of given constraints. In the second part of the experiment you will learn how to implement the layout manually, using an assisted mode technique and in a fully automatic mode to understand the advantages and disadvantages of each mode. For each layout, you will run the standard design rule and layout vs schematics checks to verify that the layout is correctly implemented.

Experiment Guide:

Contact Person: