The goal of this project is to provide the students with a deep knowledge, understanding and experience of all stages of the VLSI design process from concept to the testing of the fabricated silicon. In this project, the students will design and implement a hardware accelerator for an image demosaic algorithm.
Backend Design
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The goal of this project is to perform the complete backend design of the OFDM transmitter chip and its integrated memories. This includes : synthesis, gate level simulation, physical (layout) design and verification, timing verification, power and power grid analysis. The chip may then be submitted for fabrication. The implementation will be done in Tower CMOS 0.18u technology.
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The RSA algorithm stood out among asymmetric encryption systems as a conceptually simple and practical encryption and authentication method which provides a near perfect level of security. Public-key cryptographic systems, such as the RSA often involve modular exponentiation (Z = Ye mod n). This widely used and computational complex operation is performed using successive modular multiplications (C = AB mod n). The performance of such cryptosystems is primarily determined by...