The goal of this project is to provide the students with a deep knowledge, understanding and experience of all stages of the VLSI design process from concept to the testing of the fabricated silicon. In this project, the students will design and implement a hardware accelerator for an image demosaic algorithm.
All the modern technologies including computers, communications, automotive and numerous more that provide unprecedented processing capabilities and communication speeds have been made possible due to the advancements in VLSI technology. The forecast for this trend indicates that demand for processing speeds and communications bandwidth will continue to increase rapidly driving a steep increase in demand for VLSI engineers.
The goal of this project is to provide the students with a deep knowledge, understanding and experience of all stages of the VLSI design process from concept to the testing of the fabricated silicon.
Image and video capture devices are a common commodity. Today almost everyone carries at least one camera. Even though the images we get from cameras are very pleasing, the raw data obtained by the sensor is almost unusable without some post-processing. For example, usual camera sensors capture bayer pattern – the R, G, B values are provided only for a subset of pixels in a pre-defined pattern. One of the first tasks of the camera is to fill in the missing samples of R, G and B for all pixels in a smart way – the process termed demosaic.
In this project, the students will design and implement a hardware accelerator for an image demosaic algorithm.
The project stages will include:
Architectural design
Frontend design: Architectural and logic implementation in Systemverilog and functional simulation.
Backend Design: Synthesis, scan insertion, logical equivalence checking, floorplanning, power grid design and analysis, standard cell placement, clock tree synthesis, power route, detailed route, timing analysis (setup and hold analysis) + ECO for timing closure, power analysis (dynamic with vectors), layout verification (LVS/DRC/antenna checks/dummy insertion).
The focus of the second part of the project is on the backend design and testing of the silicon.
Prerequisite: Digital Systems and Computer Structure – 044252