Recent research in nanoelectronics has begun exploring the potential of carbon nanotube field effect transistors (CNFETs) as a successor to CMOS.
In order to evaluate the potential of CNFETs as an alternative to silicon CMOS technology, SPICE models of CNFETs have been developed.
The goal of this project is to develop a smart algorithm, based on logic effort, to design circuits more efficiently for delay optimization.
Recent research in nanoelectronics has begun exploring the potential of carbon nanotube field effect transistors (CNFETs) as a successor to CMOS. Studies of individual carbon nanotubes have demonstrated that they have excellent electrical properties, including high electron mobility. Experiments with CNFETs have further demonstrated that these devices have large transconductances, which indicates a great potential for nanoelectronic circuits. While studies of individual nanotubes and CNFETs provide reason for optimism, they are not comprehensive enough to enable conclusions about large-scale nanoelectronics. The viability of CNFET electronics depends on the behavior of logic gates that are composed of multiple CNFETs and used in larger circuits. In order to evaluate the potential of CNFETs as an alternative to silicon CMOS technology, SPICE models of CNFETs have been developed. Several student projects have demonstrated the potential of CNFET-based circuits for delay and power consumption reduction.
Project Description:
The goal of this project is to develop a smart algorithm, based on logic effort, to design circuits more efficiently for delay optimization.
Prerequisites:Electronic Switching Circuits (044147) or Electronic Circuits (044137)
Advisor: Sharon Rechnitz