The Technion's innovative TMOS sensors utilize the widely available and affordable CMOS-SOI technology together with MEMS micromachining to a achieve break-through in passive IR imaging. The CMOS-SOI technology allows integration of the 2D sensors focal plane array matrix with the analog readout, which the subject of this project.
Many types of sensors use capacitive sensing, including sensors used to detect and measure proximity, position or displacement, humidity, fluid level, and acceleration. Digital audio players, mobile phones, and tablet computers use capacitive sensing touchscreens as input devices. However, there is not much use of this technique in the field of infrared sensing.
In this project, you will design, implement and simulate capacitive mode readout circuits for sensors in a 10×10 matrix.
The sensing is based on a TMOS transistor, operated in depletion mode, whose capacitance depends on temperature. A ramp signal at the input or at the gate of the TMOS transistor, will result in a charge at the feedback capacitor.
Several architectures will be analyzed during the evaluation study phase and then the best one will be implemented and simulated in schematics and layout. The circuits should be designed under constraints of minimal power, layout area, signal cross talks and noise reduction.
You will be responsible for the circuit requirements analysis and specifications definition, focusing on maximizing gain and minimizing noise introduced by the readout. Circuit design and simulations and analog layout will be done using Cadence tools.
Prerequisites: Linear Circuits.
Recommended courses: Introduction to VLSI