The project is to develop the SW stack for the Multi-Core RING Architecture. (C – without any external libraries). In the project the students will design a SW library for “Distributed Computing" using the embedded RING architecture.
Full Project Description
The project is to develop the SW stack for the Multi-Core RING Architecture. (C – without any external libraries). In the project the students will design a SW library for “Distributed Computing” using the embedded RING architecture.
Part1 – Design and implement “Live tests” for the RV32I/E cores to enable and test the RV32I instruction set.
Part2 – Using the Ring Architecture the SW design will need to manage the multi core coherency and avoid starvation & deadlocks.
The software students will work closely to the hardware students design the core and the ring interconnect IP to define the exact SW-HW embedded handshakes for all MMIO transactions.
The SW library should be compiled and used in the RISC-V Tool-Chain, loaded to the Ring/Cores memories and tested i.e.
C->Compiler->Assembly->Linker->Assembler->Machine Code->Systemverilog memory consumable format.
As part of the project the students are required a SW Stack guide for using the Embedded Multi Core Accelerator.
This project is part of an “Embedded Accelerator for Distributed Computing” system that is composed of (1) multiple RISC-V cores interconnected with a (2) Ring Controller IP and an accompanying (3) SW stack with distributed computing support. (1) and (2) implemented in separate projects.
Prerequisites: Background in programming
Supervisors: Avi Salmon (Intel)