Write-Once Memory (WOM) code enable to transform information such that consecutive writes to the memory would have uni-directional transition of bits. This property is useful for SSD memory since it reduces the number of program-erase cycles, thus it increases the memory endurance and might and also performance impact.
In this project, the students will do analysis/trade-off of new WOM codes efficiency and power/area/throughput comparison. The goal is to implement a design of WOM codec. The implementation includes spec and architecture definition, logic design using the Verilog HDL, verification and synthesis. The emphasis of this project will be on minimum area efficiency of the design.
· Understanding of WOM codec and Flash memory background.
· Architecture development, logic design, implementation in verilog HDL, simulation, synthesis and layout.
The project requirements include learning the algorithm, designing the architecture and implementing it in Systemverilog. The design will then be simulated and synthesized and finally the layout will be generated using automatic layout tools.
Prerequisites: Logic Design