The first steps in the physical design of VLSI chips are partitioning and floorplanning. Partitioning is the process of dividing the chip into smaller pieces so that each piece is easier and faster to run. Floorplaning is the process of providing a shape to each piece so that the sum of the pieces is the entire chip and there are no overlaps.
Artificial neural networks is a kind of a learning system. A system which is able to learn to do different tasks. Several researchers have showed that neural networks can be used to perform VLSI placement. An example for such a research can be found here:
The purpose of this project will be to implement the algorithm presented in the paper and to test it on several circuits. For simplicity – the project will be written in Tcl under ICC or Encounter (existing floorplanning tools).
Prerequisites: Any programing language with ability to parse files. Knowledge in Verilog is an advantage