Mixed Signal Readout System for IR Camera Based on Verilog/VHDL

The Technion's innovative TMOS sensors utilize widely available and affordable CMOS-SOI technology together with MEMS micromachining to achieve break-through in passive IR imaging. The CMOS-SOI technology allows the integration of the 2D sensors focal plane array matrix with the analog readout, which is the subject of this project.
In this project, you will design, implement and simulate top level architecture for an IR camera system that includes 10x10 matrix of IR sensors, readout circuits and external controls.
The sensing is based on a TMOS sensor, operated in subthreshold mode, whose internal parameters depend on temperature. The circuits are designed under the constraints of minimal power, layout area, signal cross talks and noise reduction. The external controls is required for biasing, circuits stabilization by an external feedback and video output correction.


You will be responsible for VHDL/Verilog implementation of the control logic and also for the mixed signal cadence simulations of the readout circuits and digital blocks. The readout circuitsalready exist. You are required to understand the circuits’ design, implement a digital controller accordingly, and integrate analog and digital domains in one top level simulation. Top level circuits and system design and simulations will be performed using Cadence tools.

Prerequisites: Logic Design