Hardware Implementation of a Video Processing Superblock Accelerator

Project description:

Background:

The goal of the project is to design and implement a video processing accelerator to allow real time processing of a video stream. The accelerator will be composed a series of independent video processing units each of which receive a video stream as input and generate a processed video stream at the output which is fed into the next unit.

Alpha blending is the process of combining one image with a background to create the appearance of partial or full transparency.

Project Goal:

The main task of this project is to design and implement a digital video alpha-blending core for video stream and to connect it to two existing video processing blocks to form a video processing superblock accelerator. The design will be parametrized to support different video resolutions.

The main challenges of the alpha blending block implementation are:

  • Low latency (“video in => video out),
  • High video resolutions
  • High frame rate

Project requirements:

  • Writing design requirements and high level design description architecture for video processing superblock.
  • Writing design requirements and high level design description architecture for alpha blending block.
  • HDL implementation of alpha blending block.
    • Video in/out – AXI STREAM protocol
    • alpha blending implementation
    • efficient memory usage (for video buffering and algorithm calculations )
    • parametrization of the design
  • Build of simulation environment and full verification of the requirements
    • Including implementation of reference model (Matlab/Python)
  • Synthesis and layout

Prerequisites :  Digital Systems and Computer Structure – 044252

Supervisor: Pavel Gushpan  –  pavel.gushpan@gmail.com