Floorplan using Placement Algorithms

The first steps in the physical design of VLSI chips are portioning and floorplanning. Partitioning is the process of dividing the chip into smaller pieces so that each piece is easier and faster to run. Floorplaning is the process of providing a shape to each piece so that the sum of the pieces is the entire chip and there are no overlaps
The object of this project is to perform the process of floorplanning of a chip by dividing each piece into smaller sub-pieces and using a placement algorithm on the entire “chip”.
After the placement – the sub-pieces should be merged into the final shape of the larger pieces
The length of this project is one semester. It can be extended to two semesters. The 2nd part of the project will take care of the connectivity between the blocks

Prerequisites: Any programming language with ability to learn new concepts quickly