In this project, the students will develop from scratch an equivalent tool for the memristive memory processing unit (mMPU). The students will define and implement a verification methodology for verifying an mMPU instruction sequence against an equivalent CMOS logic.
Functional verification checks if a proposed design actually does what it is supposed to.This is a generally a complex task so methodologies (like UVM) and tools have been developed to help perform the verification process. Usually this requires a simulation environment with input vectors as well as outputs to check for bugs. Simulators and drivers will provide the inputs in a convenient way where as the monitors will record outputs of the design.
The Memristive Memory Processing Unit (mMPU) is a new process-in-memory computer architecture, which performs the computation without moving the data from the computer’s main memory (RAM). The logic implementation in the mMPU is based on emerging memory technology of ReRAM (resistive RAM), transpose memory array, and the MAGIC NOR operations, which reveal large vector operations.
In order to benefits from this new processing paradigm, new algorithms have been developed and existing applications have been adapted.
Description: Functional verification is a well-known concept in CMOS/ASIC design projects.
In this project, the students will develop from scratch an equivalent tool for the memristive memory processing unit (mMPU). The students will define and implement a verification methodology for verifying an mMPU instruction sequence against an equivalent CMOS logic.
Supervisor : Natan Peled
TBD: implementation tools, probably UVM (SystemVerilog) and/or python.