Performance aspects are becoming more and more relevant in modern hardware architectures and introduce various engineering challenges in the ASIC domain.Performance plays a central role in both pre-silicon and post-silicon phases and corresponds with embedded-software architecture (e.g. real-time QoS decisions). The performance widget displays data for performance metrics of mobile devices and can be configured to monitor any performance metric. This project proposes designing and implementing a designated Performance Widget IP Core, which monitors the system performance in a real-time fashion.
Project description:
Abstract
Performance aspects are becoming more and more relevant in modern hardware architectures and introduce various engineering challenges in the ASIC domain.Performance plays a central role in both pre-silicon and post-silicon phases and corresponds with embedded-software architecture (e.g. real-time QoS decisions). The performance widget displays data for performance metrics of mobile devices and can be configured to monitor any performance metric.
This project proposes designing and implementing a designated Performance Widget IP Core, which monitors the system performance in a real-time fashion. The IP is triggered by the software host through either APB registers or JTAG probing interface. It can be dynamically configured for monitoring the desired metrics by various means, e.g. counters, histograms, statistics, etc. The widget is aimed for pre-silicon debug, post-silicon validation and for an operational QoS usage.
The figure illustrates a schematic top-view of the Performance Widget IP integration.
References
- AMBA APB – http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ihi0024c/index.html
- JTAG: https://en.wikipedia.org/wiki/JTAG
- Performance:
- Common metrics: https://en.wikipedia.org/wiki/Computer_performance#Latency
- QoS basics: https://www.youtube.com/watch?v=VgzRG2CiDcw
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0422b/ch02s02s02.html
Previous knowledge required
- 044262 – Logic Design
Design goals and challenges
- Learning the basics of Verilog RTL coding language (commonly used in the industry).
- Learning the basics of communication protocols, hereby AMBA APB and JTAG
- Learning the basics of performance architecture in the ASIC world
- Learning common Coding standards which are commonly used in the industry.
- Practice in coding design using arch. spec., ramping up an advanced accelerator as an IP